4ch 105 Msps 30 MHz 14 bit ADC

4 channel FMC ADC module

Max. sample rate 105 Msps
Analog bandwidth 30 MHz. DC-coupled
Bits/sample 14 bit
ENOB 11, 11.5, 11.7 bit (@ +/-50mV, +/-0.5V, +/-5V range)
Channels 4
Connectors 4 x LEMO 00 for signals, 1 x LEMO 00 for trigger
Input impedance 1 kOhm / 50 Ohm – software selectable
Gain steps +/-50 mV, +/-0.5 V, +/-5 V for full scale
Offset correction range +/- 5 V for every input voltage range
Max. gain error +/- 1 %
SNR 67.7 dB, 70.8 dB, 72.2 dB (@ +/-50mV, +/-0.5V, +/-5V range)
ADC interface Serial LVDS, 2 pairs for each channel
Clock source External or Internal
Full technical documentation can be found here

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The FmcAdc100M14b4cha is a 4 channel 100MSPS 14 bit ADC card in FMC (FPGA Mezzanine Card) format. It has an analog input bandwidth of 30MHz. It has three software programmable input ranges: +/-50mV, +/-0.5V and +/-5V. A programmable offset in the range of +/- 5V can be added to the input signals. By default it uses only signals from the LPC rows of the HPC connector that is mounted.

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